Invio Platform

Invio™: The Custom EDA Platform

Invio Platform Diagram

RTL Processing Engine

Designed from the ground-up to be intuitive and efficient, the RTL Processing Engine is the heart of the Invio platform. Covering both synthesizable “design” RTL as well as testbench code, and the full-range of System Verilog and VHDL constructs, the RTL Processing Engine allows you to Parse, Search and Understand your RTL to a degree that is groundbreaking in the EDA industry!

Full Language Support

Included with Invio is complete HDL language support. This includes the synthesizable and non-synthesizable subsets of System Verilog, Verilog and VHDL. The HDL coverage spans complex datatypes, packages, classes, interfaces and more! Mixed-language (System Verilog/VHDL, Verilog/VHDL), along with Verilog-AMS, is also fully supported.

Intuitive APIs

Invio’s Python and Tcl APIs are designed to abstract the underlying HDL constructs of your design to an “english-like” level. The APIs include familiar commands such that RTL connectivity and other relationships between constructs like statements, expressions, pins, ports and assignments can all be parsed and understood without writing complicated code.

RTL Processing Engine has Full language support and intuitive APIs

Custom GUI Builder

The Invio™ platform simplifies the complex and time-consuming task of creating clean and intuitive graphical user interfaces for your EDA tool frontend. Integrated directly into Invio™, the widget library enables your team to quickly add a GUI frontend to any EDA development project!

Application Packager

In order to ensure a smooth deployment process for your custom EDA tool, the Invio™ platform’s Application Packager allows you to compile your application into a single executable file. This removes the ability for on-site custom mods to your application, reducing the support burden and enabling cleaner, more consistent release and deployment flows.

Add-On Modules

The Invio platform supplies add-on modules to accelerate custom tool development in a range of EDA areas.

RTL Modification

Modify RTL as an experienced designer would in a clean, “diff-able”, manner.

Functional Verification

Extend the RTL Processing Engine to understand UVM, coverage and assertions.

Netlist Modification

Interpret the SDC API and enable modification of gate netlists.

SoC Assembly

Package and assemble RTL and testbenches using IP-XACT.

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Invionics Software Inc.
1200-555 West Hastings Street,
Vancouver, BC, V6B 4N6,



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